| Position | Foundation IP Design Expert |
| Posted | 07 Apr 2026 |
| Expired | 07 May 2026 |
| Company | Beijing Foreign Enterprise Management Consultants Co.,Ltd. |
| Location | Singapore | SG |
| Job Type | Full Time |
Latest job information from Beijing Foreign Enterprise Management Consultants Co.,Ltd. for the position of Foundation IP Design Expert. If the Foundation IP Design Expert vacancy in Singapore matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.
Please note that applying for a job may not always be easy, as new candidates must meet certain qualifications and requirements set by the company. We hope the career opportunity at Beijing Foreign Enterprise Management Consultants Co.,Ltd. for the position of Foundation IP Design Expert below matches your qualifications.
On behalf of Huawei, a world-renowned information and communication technology company, we are seeking passionate and talented individuals to join our team as Foundation IP Design Expert.
Job Description
1. Define performance and reliability specifications for standard cells and Memory IPs.
2. Research and develop architecture for standard cell libraries and Memory IP; analyze industry trends and emerging technologies.
3. Design performance critical circuits for standard cells and Memory IP.
4. Guide design engineers in completing various tasks in IP development.
5. Identify and resolve design challenges in standard cell and Memory IP projects.
6. Design test chip structures for standard cell and Memory IP validation.
7. Collaborate with layout engineers to co-optimize circuit and layout for performance; proficient in library characterization.
8. Customize and develop high-performance, high-reliability IPs for automotive and high performance-compute SoC chips.
Requirements
1. Master’s degree or above in Electronics, Communications, Computer Engineering, or related fields.
2. Strong foundation in microelectronics and semiconductor physics.
3. Proven leadership in delivering complete standard cell libraries or Memory IPs from design to signoff.
4. Deep understanding of semiconductor device physics, reliability analysis, process parameters, in advanced technology node (3nm/5nm/7nm).
5. More than 10 years of experience in standard cell or Memory IP design.
6. Extensive hands-on experience in high-performance, high-reliability, and energy-efficient circuit design; XTCO (system and design technology co-optimization) experience preferred.
7. Fast learner with a drive to explore new technologies and break through technical barriers.
8. Strong team player with a meticulous, optimistic, and proactive attitude.
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