| Position | Senior Design Engineer |
| Posted | 30 Jul 2026 |
| Expired | 29 Aug 2026 |
| Company | TeraHop |
| Location | Singapore | SG |
| Job Type | Full Time |
Latest job information from TeraHop for the position of Senior Design Engineer. If the Senior Design Engineer vacancy in Singapore matches your qualifications, please submit your latest application or CV directly through the updated Jobkos job portal.
Please note that applying for a job may not always be easy, as new candidates must meet certain qualifications and requirements set by the company. We hope the career opportunity at TeraHop for the position of Senior Design Engineer below matches your qualifications.
Key Responsibilities:
Spec & Risk Assessment: Participate in project requirements and design specification discussions, align on target goals, and fully identify key technical feasibility and potential risks.
Architecture & IP Development: Conduct research on key RF block architectures, including but not limited to high-performance IP development for CTLE, VGA, TIA, DRV, and FFE, and comprehensively evaluate the pros and cons of various topologies.
Layout Layout & Post-Sim Optimization: Collaborate closely with Layout engineers on placement and routing, and perform iterative post-layout simulations to optimize critical performance metrics.
Documentation & Delivery: Output corresponding design reports at each development stage to ensure high-quality milestones and delivery.
Tape-out Testing & Debugging: Actively participate in chip bring-up and silicon testing, collaborate with test engineers to define test plans, perform simulation-to-measurement alignment analysis, and efficiently locate and resolve hardware issues.
Job Requirements:
Education & Experience: Master’s degree with 5+ years, or Ph.D. with 3+ years of relevant industry working experience.
Technical Expertise: Proficient in high-bandwidth RFIC circuit development based on SiGe / CMOS process nodes.
Layout Supervision: Capable of supervising and guiding backend Layout engineers on physical placement and routing constraints.
Silicon Validation: Proven track record in chip bring-up, debugging, and silicon issue localization, with multiple successful tape-out experiences.
Soft Skills: Strong team player with a high level of collaborative spirit and the ability to work under pressure.
Preferred Qualifications: Prior design experience in optical modulation drivers or optical receiver front-ends (e.g., wideband DRV, VGA, TIA, and other related IPs) is highly preferred.
After reading and understanding the criteria and minimum qualification requirements explained in the job information Senior Design Engineer at the office Singapore above, immediately complete the job application files such as a job application letter, CV, photocopy of diploma, transcript, and other supplements as explained above. Submit via the Next Page link below.
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